Engineer I-Analog Design

Microchip Technology
March Road, Ottawa, Canada
$76K-$114K a year
Full-time

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us?

Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization?

We offer all that and more at Microchip Technology, Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability.

They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually.

We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our ;

we affectionately refer to it as the and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over without a great team dedicated to empowering innovation. People like you.

Visit our page to see what exciting opportunities and company await!

Job Description :

The Timing and Communication Group (TCG) at Microchip is actively seeking an analog design engineer. The responsibility spans wide range of activities such as the design, simulation and validation of analog integrated circuits (ICs).

The products are usually mixed signal SOC designs.

The Analog team develops the critical IP blocks used in the TCG timing products. These circuits include multi-GHz PLL circuits, high speed digital circuits, MEMS drivers and high-speed performance IO pads.

As an analog design engineer and as part of the Analog IP team the individual will :

Work with analog design lead and architects to design specific analog IP blocks.

Simulate analog circuits across process corners and operating conditions.

Models design blocks to be included on top level mixed signal simulations.

Block level validation of process silicon devices and system level lab evaluation

Requirements / Qualifications :

Bachelor's or master’s degree in Electrical Engineering

Minimum 1-2 years’ experience as an IC layout designer using deep submicron CMOS process technology

Knowledge of chip level integration and ESD concepts is a plus

Knowledge in scripting using SKILL language, Perl and TCL is a plus

Strong knowledge in Cadence IC layout flow and tools

Familiar with Innovus, is a plus

Experience in layout verification and debugging such as DRC, ERC, LVS, ANTENNA DRC

Floor planning from sub-block to chip top level

Very good understanding of matching techniques

Knowledge in TCL, Perl, Python and / or SKILL languages is a plus

Good communication, teamwork skills and experience working with multi-site team desirable

Travel Time : 0% - 25%

0% - 25%

Pay Range :

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments.

In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading IESPP program with a 6-month look back feature.

Find more information about all our benefits at the link below : The annual base salary range for this position, which could be performed in Ontario, is $76,000 - $114,000.*

Range is dependent on numerous factors including job location, skills and experience.

Ontario Accommodation :

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30+ days ago
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