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ASIC, Digital Design, Sr Engineer

SynopsysMississauga, Peel Region, Canada

20 days ago

Job description

Seeking a motivated and innovative mixed signal AMS co-simulation verification engineer with strong theoretical and practical background in high-speed data recovery circuits. Working as part of an experienced mixed-signal design team, the candidate will be involved in verifying current and next generation Backplane Ethernet, PCIe, SATA, and USB 2 / 3 / 4 SERDES products. The position offers an excellent opportunity to work with an expert team of digital, analog and mixed signal engineers responsible for delivering high-end mixed-signal designs.

Responsibilities include :

Setup UVM and VMM SystemVerilog testbenches to co-simulate mixed signal designs in both analog and digital coexist environment
Analyzing / verifying the functionalities of SERDES
Defining and tracking verification test plans
Debugging simulation failures in both analog and digital domains
Creating top level analog testbenches for SERDES
Performing physic layout reliability analysis for SERDES

Requirements :

Ability to write scripts in languages such as Perl, Python and Unix shell.

Familiar with Verilog and SystemVerilog.

Experience or knowledge with analog circuitry such as bandgap, opamp, PLL, Transmitter / Receiver designs.

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

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