About the RoleAs a Digital Implementation Engineer, you will be responsible for the digital physical design and chip implementation of our memory PHY IP and test chips.Responsibilities and DutiesDevelop, implement and deliver memory PHY IP and test chips across a broad range of foundry process technologies, primarily low geometry FinFet nodesTasks to include timing constraint development, synthesis, power optimization, STA, equivalence checking, generation of timing and physical modelsUsing industry standard EDA tools and techniques to develop the highest quality memory PHY IP with aggressive PPA targetsDevelop and automate our digital implementation flowsImplement strong design quality checking methodologies to ensure our customers consistently receive the highest quality memory PHY IPSupport our customers in integrating our IP productsRequirementsBachelor / Master in Electrical or Computer EngineeringExperience of implementing digital designs from RTL through synthesis to signoff, including synthesis, DFT, PnR, STA, DRC / LVS, EMIR analysis, equivalence checking etc.Deep understanding of timing constraints, clock domain crossing strategies, and foundry process technologiesUnderstanding of signoff and release requirements of digital semiconductor IPExperience of major EDA tools and design methodologies for high-speed digital semiconductor IPWorking knowledge of scripting for automation, primarily in TCL, Perl, and PythonStrong analytical, problem-solving, and communication skillsTSS is looking to hire an exceptional Digital Implementation Engineer to join our team in Markham, Ontario. If you love to work and grow in a fast-paced environment where you can innovate and truly enjoy your work, please send your resume to [email protected] and include the name of the position in the subject line.